Job description
At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible.聽Our culture is one of respect and collaboration.
We value humility and believe in direct communication.聽Our team is inclusive, and our differing perspectives allow for better solutions.聽We are seeking individuals passionate about tackling challenges and are driven by execution.聽 Ready to come find your playground? Together, we can help shape the endless possibilities of AI.
Location:
Hybrid, working onsite at our Bengaluru, Karnataka headquarters 3-5 days per week.
DFT ATPG Engineer
D-Matrix is searching for an experienced DFX Engineer to join the fast-growing DFT design team. You will be responsible for defining, specifying, and implementing current and future DFX solutions for聽AI Accelerators SoCs聽. We鈥檙e revolutionizing AI acceleration with Digital In-Memory Computing (DIMC) and heterogeneous chiplet architectures, delivering unprecedented efficiency for data centers and large language models (LLMs). As a Series B startup backed by industry giants, we combine the agility of a disruptor with the technical ambition of a market leader.
Join a dynamic team and give a boost to your personal career in a challenging and fascinating ever-growing, never-boring area! We look forward to welcoming you to the team!
Your Responsibilities Will Include:
路聽聽聽聽聽聽聽聽聽Partitioning for ATPG and hierarchical approaches.
路聽聽聽聽聽聽聽聽聽ATPG compression and serialization.
路聽聽聽聽聽聽聽聽聽RTL-Scan insertion and design rule fixing.
路聽聽聽聽聽聽聽聽聽STA constraints, Primetime execution, and timing exception flow.
路聽聽聽聽聽聽聽聽聽Interfacing with ASIC design teams to ensure DFT design rules and coverages are met.
路聽聽聽聽聽聽聽聽聽Generating high-quality manufacturing ATPG test patterns for stuck-at (SAF) and transition fault (TDF) models using on-chip test compression techniques.
路聽聽聽聽聽聽聽聽聽Performing ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations.
路聽聽聽聽聽聽聽聽聽Conducting in-depth knowledge and hands-on experience in ATPG coverage analysis.
路聽聽聽聽聽聽聽聽聽Working with Product/Test engineering teams on the delivery of manufacturing test patterns for ATE.
路聽聽聽聽聽聽聽聽聽Being responsible for diagnostic tool generation for ATPG, MBIST, and bring-up on ATE.
路聽聽聽聽聽聽聽聽聽Having experience with state-of-the-art industry-standard DFT tools.
路聽聽聽聽聽聽聽聽聽Being hands-on from the “nitty gritty” details to high-level planning.
Minimum Qualifications:
路聽聽聽聽聽聽聽聽聽BE / ME (or similar) in Electronic Engineering, Computer Science, Computer Engineering, or a related field.
路聽聽聽聽聽聽聽聽聽5+ years of experience with DFT technologies, including scan test and MBIST.
路聽聽聽聽聽聽聽聽聽Experience with a hardware description language such as Verilog, System Verilog, or VHDL.
路聽聽聽聽聽聽聽聽聽Experience with one or more scripting or programming languages (e.g., Perl, Python, TCL, C, etc.).
路聽聽聽聽聽聽聽聽聽Ability to work well in a diverse team environment.
路聽聽聽聽聽聽聽聽聽Experience delivering detailed technical documentation
Equal Opportunity Employment Policy
d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We鈥檙e committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.
d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.
