Job Description
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Role Overview
Astera Labs is seeking a Tech Lead Field Application Engineer to serve as the technical bridge between our customers and engineering teams, supporting our industry-leading connectivity solutions across the Aries PCIe retimer, Scorpio Ethernet fabric switch, and Leo CXL memory connectivity platforms. This is a high-impact, customer-facing role where you’ll be embedded with hyperscaler and OEM partners, helping them design, validate, and deploy Astera Labs silicon into the AI infrastructure systems that are reshaping the data center landscape.
As AI clusters scale to tens of thousands of GPUs and accelerators, the connectivity fabric binding compute, memory, and networking together has never been more critical. You’ll operate at the intersection of cutting-edge silicon and real-world system deployment—solving complex signal integrity, interoperability, and performance challenges that directly influence product roadmaps and customer success. This role demands a self-starter who thrives in ambiguity, can independently drive technical engagements, and is energized by frequent travel to customer sites.
Key Responsibilities
- Customer Technical Engagement
- Serve as the primary technical point of contact for strategic customers, providing deep application support for Aries, Scorpio, and Leo product families
- Drive board design reviews, schematic reviews, and system-level debug sessions with customer hardware and system development teams
- Deliver technical presentations, training sessions, and product demonstrations tailored to customer architectures and use cases
- System Debug & Enablement
- Lead hands-on debug of PCIe, Ethernet, and CXL/DDR memory connectivity issues in customer server and rack-scale platforms
- Collaborate with internal silicon, firmware, and applications engineering teams to resolve field issues and drive root cause analysis
- Develop and maintain application notes, reference designs, and technical collateral based on field learnings
- Strategic Feedback & Product Influence
- Capture and communicate customer requirements, competitive insights, and system architecture trends to product management and engineering
- Represent the voice of the customer in internal roadmap discussions, helping shape next-generation connectivity solutions
- Identify new use cases and expansion opportunities within existing accounts
Basic Qualifications
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field
- 5+ years of experience in server hardware design, cloud system development (SysDev), or field application engineering
- Hands-on experience with PCIe protocol/physical layer including signal integrity fundamentals, link training, and debug
- Working knowledge of DDR memory subsystems and memory interface design or validation
- Self-starter mentality with the ability to work independently and drive customer engagements with minimal supervision
- Willingness to travel up to 40-50% to customer sites
Preferred Qualifications
- Experience with CXL protocol or CXL-enabled memory architectures
- Familiarity with Ethernet switch or NIC silicon in data center environments
- Experience working directly with hyperscaler or Tier-1 OEM customers
- Proficiency with lab equipment (oscilloscopes, protocol analyzers, BERT) and signal integrity tools
- Strong presentation and communication skills with the ability to convey complex technical concepts to diverse audiences
- Prior experience at a semiconductor company in an FAE or applications engineering capacity
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
